The present invention relates to a device and a method for detecting the reliability of integrated semiconductor components at high temperatures, and in particular, relates to highly accelerated tests for determining the reliability of semiconductor circuits.
A high reliability, in particular in the case of integrated semiconductor circuits, but also in thin-film technology, represents a significant factor in production and later use. Therefore, a multiplicity of tests are carried out during fabrication in order to be able to give as accurate a statement as possible with regard to the quality of a respective product, and also with regard to a respective fabrication process.
Since the structure width in semiconductor circuits is increasingly being reduced with advancing integration density, corresponding structures in large scale integrated circuits are loaded with very high current densities and/or temperatures during operation. In the case of such high current densities and temperatures, a multiplicity of mechanisms can lead to the failure of a respective semiconductor component and thus of the semiconductor circuit.
Such mechanisms are, for example, electromigration, giving rise to a material transport, in particular, in interconnects in the electron direction. Furthermore, instances of high current-density and temperature-dependent stressing can impair or destroy doping regions in a semiconductor substrate on account of barrier degradation or eutectic metal penetration. On the other hand, in field-effect transistor structures, such instances of stressing can also alter the properties of the so-called gate and/or tunnel oxides in a lasting manner, which again results in an adverse effect on the respective semiconductor components. The same applies to capacitances, inductances, memory elements, etc., formed in semiconductor substrates, in which, by way of example, passivation and intermediate dielectric layers can also be altered in a lasting manner by such current-density-, voltage- and/or temperature-dependent stressing and lead to the point of failure of the semiconductor component.
In order to be able to estimate a maximum lifetime of semiconductor circuits or thin-film circuits, a multiplicity of reliability tests are carried out, which preferably take place at elevated temperatures and current densities on specific test structures. These elevated temperatures were usually realized in special furnaces, whereby an accelerated artificial aging process can be brought about. However, since the fabrication of integrated semiconductor circuits, in particular, can last several weeks and checking for possibly defective structures is desired as early as during fabrication or immediately after completion, so-called accelerated and highly accelerated tests have been developed which enable the detection of a deviation in the fabrication in regular inspection measurements. In this case, these measurements must proceed in a range of seconds in order not to increase the fabrication time and thus the fabrication costs of respective semiconductor circuits.
FIG. 1 shows a device for detecting the reliability of integrated semiconductor components in accordance with the prior art, as is disclosed for example in the reference J. A. Scheideler, et al. xe2x80x9cThe Systematic Approach to Wafer Level Reliabilityxe2x80x9d, Solid State Technology, March 1995, page 47 et seq.
In accordance with FIG. 1, the MOS transistor, which is an integrated semiconductor component HBE that will be tested or stressed, is situated in a semiconductor substrate 1 that is pxe2x88x92-doped, for example. The semiconductor component HBE is formed in an n-type well 2 of the semiconductor substrate 1 and essentially includes a p+-doped drain region D, an associated contact K1, a p+-doped source region S with an associated contact K2, a gate oxide layer 3 and a gate or a control layer G, which is situated above the gate oxide layer 3 and essentially defines a channel region lying between drain region D and source region S.
In order to check the quality and the process reliability, in the case of a large scale integrated circuit in accordance with FIG. 1, tests are carried out at temperatures above room temperature. Diverse models are used in order to characterize the degradation behavior, and a precise knowledge of the temperature is essential. Therefore, in accordance with FIG. 1, a local heating arrangement or a heating element HE is situated in an insulating layer 4 (SiO2) in direct proximity to the semiconductor component HBE. Damage to the product on account of an external heating arrangement that is otherwise required can thereby be avoided.
In order to detect the temperature of the semiconductor component HBE to be stressed, in accordance with FIG. 1, there is a temperature sensor TS in the form of an aluminum meander that is spaced apart above the insulating layer 4. The linear relationship between the resistance and the temperature of the metal interconnect is evaluated.
What is disadvantageous, however, in the case of such a device for detecting the reliability of an integrated semiconductor component is that the distance between the structure that will be tested or the semiconductor component HBE and the temperature sensor or the aluminum meander TS is large and in between there lies one or a plurality of insulating intermediate layers 4 which constitute a large thermal resistance. As a result, a sufficiently accurate and direct statement with regard to the temperature present at the relevant region of the structure being tested or of the semiconductor component HBE is not possible. Furthermore, at higher temperatures, degradation of the aluminum or of the temperature sensor TS also occurs, for which reason, an exact and reproducible temperature determination is no longer possible after relatively long stress. As a further disadvantage of this conventional device, mention may be made of the extraordinarily high space requirement/contact area requirement, which essentially results from a 4-point resistance measurement and the pads required therefore.
Furthermore, the literature reference Gerard C. M. Mejer, xe2x80x9cThermal Sensors Based on Transistorsxe2x80x9d, Sensors and Actuators, 10 (1986) 103-125 discloses utilizing the temperature dependence of a bipolar transistor or of its base-emitter voltage for realizing a temperature sensor.
It is accordingly an object of the invention to provide an apparatus and a method for detecting the reliability of integrated semiconductor components which overcomes the above-mentioned disadvantages of the prior art apparatus and methods of this general type.
In particular, it is an object of the invention to provide an apparatus and a method for detecting the reliability of integrated semiconductor components which enables the temperature to be determined with an improved accuracy in conjunction with a reduced space requirement.
With the foregoing and other objects in view there is provided, in accordance with the invention, a device for detecting a reliability of an integrated semiconductor component. The device includes: a carrier substrate for receiving the integrated semiconductor component; a heating element for heating the semiconductor component; and a temperature sensor for detecting a temperature of the semiconductor component. The temperature sensor includes at least a portion of a parasitic functional element of the semiconductor component.
In accordance with an added feature of the invention, the parasitic functional element is a parasitic pn junction.
In accordance with an additional feature of the invention, the parasitic functional element is a parasitic bipolar transistor.
In accordance with another feature of the invention, the parasitic functional element may be a parasitic Schottky diode or a MOS diode.
In accordance with a further feature of the invention, the semiconductor component includes a resistor, a capacitance, an inductance, a diode, a field-effect transistor, a bipolar transistor and/or a thyristor.
In accordance with a further added feature of the invention, the heating element is buried in direct proximity to the semiconductor component in the carrier substrate.
In accordance with a further additional feature of the invention, an additional functional element is provided for completing the parasitic partial functional element.
In accordance with yet an added feature of the invention, the additional functional element includes at least one doping region and/or a connection.
In accordance with yet an additional feature of the invention, the semiconductor component has a region that is of relevance during testing, and the parasitic functional element lies in direct proximity to the region.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a method for detecting a reliability of an integrated semiconductor component, which includes steps of: using a temperature sensor including at least a portion of a parasitic functional element of the semiconductor component to perform a measurement mode for measuring a temperature that is caused by a heating element and that is actually present at the semiconductor component; performing a stress mode for stressing the semiconductor component at least in a manner dependent on a temperature of the heating element; and evaluating a failure instant of the semiconductor component at least in a manner dependent on the temperature that is caused by the heating element.
In accordance with an added mode of the invention, during the stressing, an electrical parameter, which is a stress current density and/or a stress voltage, is altered in the semiconductor component; and during the evaluating, the electrical parameter is taken into account.
In accordance with an additional mode of the invention, during the measurement mode, a very small measurement current is impressed on the temperature sensor.
In accordance with a further mode of the invention, during the measurement mode, a temperature that is actually present at the semiconductor component is derived from an I/V characteristic curve of the parasitic functional element or a C/V characteristic curve of the parasitic functional element.
In accordance with a further added mode of the invention, the measurement mode and the stress mode are performed separately from each other with respect to time.
In accordance with a further additional mode of the invention, during the measurement mode, the heating element is calibrated; and during the stress mode, the semiconductor component is stressed in a manner dependent on the heating element that has been calibrated.
In accordance with yet an added mode of the invention, the measurement mode and the stress mode are performed at the same time.
In particular by virtue of using a temperature sensor which includes at least a portion of a parasitic functional element of the semiconductor component to be stressed, it is possible to significantly reduce the space requirement. Furthermore, the temperature sensor is shifted significantly closer to the actually relevant region of the semiconductor component that will be considered, as a result of which, the accuracy of the temperature measurement and thus the accuracy of the reliability test are significantly improved.
The parasitic functional element preferably includes a parasitic pn junction, a parasitic bipolar transistor and/or a parasitic Schottky or MOS diode of the semiconductor component. In this way, using a parasitic functional element that is usually undesired and present anyway, it is possible to examine a respective partial region of the semiconductor component to be examined in a highly accurate manner and in direct proximity to the stressing. In addition to a very exact temperature determination in relevant partial regions of the test structure or of the semiconductor component that is being stressed, in this case the functionality of the test structure or of the semiconductor component is not disturbed by the measurement sensor, and there is usually even a reduction in the number of connections required for the measurement.
In order to avoid damage to the product, such as on a semiconductor wafer, the heating element is preferably buried in direct proximity to the semiconductor component in the carrier substrate.
In order to improve the accuracy, an additional functional element may be provided for completing the parasitic partial functional element of the temperature sensor. Doping regions and/or connection regions are usually provided. In this way, with minimal additional outlay, it is possible to realize a further increase in the measurement accuracy, which results, in particular, from using bipolar transistors as temperature sensors.
In the circuitry, in this case a parasitic functional element is selected from the multiplicity of parasitic functional elements present in such a way that it is situated in direct proximity to a region that will be stressed or a critical region of the test structure or of the semiconductor component. In this way, different regions of complex semiconductor components can also be assessed with regard to their failure probability.
With regard to the method, a highly accurate statement about the reliability of the semiconductor component is obtained in particular on account of a measurement mode that is carried out, in which a parasitic functional element of the semiconductor component is driven as temperature sensor. In addition, a stress mode is carried out, in which the semiconductor component is stressed at least in a manner dependent on the temperature of the heating element.
Preferably, a stress current density is additionally applied to the semiconductor component and is taken into account, as a result of which it is also possible to realize current-density-dependent reliability tests.
The measurement current of the temperature sensor is very small in this case, for which reason the semiconductor component remains essentially uninfluenced.
The measurement mode and the stress mode are preferably carried out separately from one another with respect to time, thereby yielding an improved accuracy. However, they can also be carried out at the same time, during which the measurement accuracy is only impaired to an insignificant extent, but a so-called real-time measurement is made possible.
In order to realize a highly accurate reliability test, the measurement mode is separated from the stress mode with respect to time, in which case the heating element is calibrated in the measurement mode. During the subsequent stressing in the stress mode, the temperature sensor or the parasitic functional elements are not connected and the temperature is set only in a manner dependent on the calibrated heating element. An optimum reliability test is produced in this way.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a Device And Method For Detecting A Reliability Of Integrated Semiconductor Components At High Temperatures, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.